Dr. Loukrakpam Merin Singh

Dr Loukrakpam Merin Singh

Dr Loukrakpam Merin Singh
Head of Department, Assistant Professor

Qualification:
Bachelor’s Degree: B.E. in Electronics and Communication Engineering from Manipal Institute of Technology in 2011.
Master’s Degree: M.E. in Microelectronics from BITS Pilani in 2014.
Ph.D.: Ph.D. from NIT Silchar in 2020

Areas of Specialization:
Approximate computing, digital VLSI circuits, machine learning VLSI architecture and low power biomedical ASIC design.

Sl. No. Name of the Project Name of the PI/Co-PI Funding Agency Type (Government/ Non-Government) Year of Award Duration of the Project Status of the Project
1. Design and Development of EEG Based Real-Time Depth of Anesthesia (DoA) Monitoring System Dr. Merin Loukrakpam MeitY Government 2022 3 Years Ongoing

Journals

  1. Merin Loukrakpam, Madhuchhanda Choudhury, “Error-Aware Design Procedure to Implement Hardware-Efficient Logarithmic Circuits”, IEEE Transactions on Circuits and Systems II: Express Briefs, 2020, Volume 67, Issue 5, pp 851-855. 
  2. Merin Loukrakpam, Madhuchhanda Choudhury, “Hardware-efficient VLSI Design for Cascade Support Vector Machine with On-chip Training and Classification Capability”, Circuits, Systems, and Signal Processing, 2020, Volume 29, pp 5272–5297. 
  3. Merin Loukrakpam, Ch. Lison Singh, Madhuchhanda Choudhury, “Error-aware Design Procedure to Implement Energy-efficient Approximate Squaring Hardware”, Nanoscience Nanotechnology Asia, 2020, Volume 10, Issue 4, pp 471-477. 
  4. Merin Loukrakpam, Madhuchhanda Choudhury, “Error-aware design procedure to implement hardware-efficient antilogarithmic converters”, Circuits, Systems, and Signal Processing, 2019, Volume 38, Issue 9, pp 4266-4279. 
  5. Merin Loukrakpam, Madhuchhanda Choudhury, “Implementation of Energy-Efficient Approximate Multiplier With Guaranteed Worst Case Relative Error”, Microelectronics Journal, 2019, Volume 88, pp 1-8. 
  6. Singh, Chabungbam Lison, Ashim Jyoti Gogoi, Chabungbam Anandini, Krishna Lal Baishnab, and Loukrakpam Merin, “Analysis and circuit sizing performance of a differential amplifier using HPSO algorithm.” International Journal of Nanoparticles, 2019, Volume 11, No. 2, pp 167-180.

Conferences

  1. Konsam, Gegerin, and Merin Loukrakpam, “Triple Linear Congruential Generator-Based Hardware-Efficient Pseudorandom Bit Generation.” in Micro and Nanoelectronics Devices, Circuits and Systems, pp. 237-245, Springer,  2022. 
  2. Merin Loukrakpam, Madhuchhanda Choudhury, “Error-Aware Design Procedure to Implement Hardware-Efficient Logarithmic Circuits” in IEEE International Symposium on Circuits & Systems (ISCAS), Sevilla, Spain, 2020. 
  3. Chanda, Saurav, Koushik Guha, Santu Patra, Loukrakpam Merin Singh, Krishna Lal Baishnab, and Prashanta Kumar Paul. “An Energy Efficient 32 Bit Approximate Dadda Multiplier.” In 2020 IEEE Calcutta Conference (CALCON), pp. 162-165. IEEE, 2020.
  4. Chanda, Saurav, Koushik Guha, Santu Patra, Anupam Karmakar, Loukrakpam Merin Singh, and Krishna Lal Baishnab. “A 32-bit Energy Efficient Exact Dadda Multiplier.” In 2019 IEEE 5th International Conference for Convergence in Technology (I2CT), pp. 1-4. IEEE, 2019.
  5. Merin Loukrakpam, Ch. Lison Singh, Madhuchhanda Choudhury, “Energy-efficient approximate squaring hardware for error-resilient digital systems” In 2018 IEEE Electron Devices Kolkata Conference (EDKCON), pp. 202-206. IEEE, 2018.
  1. Procurement Nodal Officer, TEQIP-III from 4th January 2019 to 30th September 2021.